Applied Materials (AMAT) is a publicly traded Lithography & Equipment company founded in 1967 and based in Santa Clara, USA.
| Date | Stage | Amount | Valuation | Lead investors |
|---|---|---|---|---|
| Oct 5, 1972 | IPO | $3M | — | — |
Applied Materials reported record Q3 FY2026 revenue of $9.12 billion, up 25% year-over-year, driven by AI-related demand. GAAP gross margin expanded 150 basis points to 50.3%, with operating income of $3.08 billion or 33.7% of revenue. GAAP diluted EPS was $3.17, up 43% YoY. The company achieved its 13th consecutive quarter of year-over-year gross margin expansion. Semiconductor Systems revenue reached $7.04 billion with 55.3% gross margin. Applied introduced six new chipmaking systems for DRAM and advanced packaging, including enhanced Centura Prime Epi and Opta Quad CMP. EPIC Center R&D partnerships expanded to 11 engagements. Management raised calendar 2026 Semiconductor Systems revenue guidance and expects strong 2027 growth. Q4 FY2026 guidance: total revenue of $10.25B ±$500M and non-GAAP EPS of $4.02 ±$0.20.
Q4 FY2026: revenue $10.25B ±$500M; non-GAAP EPS $4.02 ±$0.20. Management raised Semiconductor Systems calendar 2026 revenue guidance and expects strong 2027 growth.
Tools that lay down the ultra-thin conductive, dielectric, and barrier films forming each layer of a chip, using chemical vapor deposition, physical vapor deposition (sputtering), and epitaxial growth. Applied Materials is the market leader in deposition, and its Endura and Producer platforms are workhorses in virtually every advanced fab. These systems are critical for gate-all-around transistors and advanced interconnects.
Equipment that precisely removes material to define transistor and interconnect structures, including conductor and dielectric etch plus selective-removal tools like the Sym3 and SelectraTM platforms. Atomic-scale precision is essential as features shrink and 3D architectures (3D NAND, gate-all-around) proliferate, making etch one of the fastest-growing and most technically demanding steps in chipmaking.
Imaging, metrology, and inspection systems—including high-resolution eBeam tools—that measure dimensions and detect defects across the wafer to maximize yield. As process margins tighten at advanced nodes, this PDC portfolio gives fabs the visibility needed to control variation. It is a high-growth, high-margin segment central to Applied's role in enabling smaller, denser chips.
Equipment for chiplet-based and 3D integration—through-silicon vias, hybrid bonding, and wafer-level packaging—that stitches multiple dies into a single high-performance package. As transistor scaling slows, advanced packaging is increasingly where AI-accelerator performance gains come from, positioning Applied Materials at the center of heterogeneous-integration roadmaps for HBM and multi-die designs.
624 patents on file, but none with both an extractable figure and an abstract on Google Patents yet.