SiFive is an EDA & IP company founded in 2015 and based in San Mateo, USA. It has raised $764.5M in total funding, most recently a Series G in 2026 at a $3.6B valuation.
| Date | Stage | Amount | Valuation | Lead investors |
|---|---|---|---|---|
| Apr 9, 2026 | Series G | $400M | $3.6B | Atreides Management |
| Mar 1, 2022 | Series F | $175M | $2.5B |
| Coatue Management |
| Aug 1, 2020 | Series E | $60M | — | SK Hynix, Saudi Aramco |
| Jun 6, 2019 | Series D | $65.4M | — | Sutter Hill Ventures, Spark Capital |
| Apr 2, 2018 | Series C | $50.6M | — | Intel Capital |
| May 1, 2017 | Series B | $8.5M | — | — |
| Sep 1, 2015 | Series A | $5M | — | — |

SiFive's Krste Asanović argues RISC-V is inevitable and its ecosystem is strong in a keynote at the RISC-V summit.

Space industry adopts RISC-V instruction set architecture as a standard for satellite and spacecraft computing.

RISC-V processors enable real-time forest monitoring in the Amazon to combat deforestation and track carbon sequestration.

RISC-V instruction set gains traction in data centers, edge AI, and space applications as an open-standard alternative to proprietary architectures.
SiFive's flagship AI/ML RISC-V processor, a multi-core-capable core with the RISC-V Vector extension plus SiFive Intelligence Extensions, optimized for vector and matrix compute from edge devices to the data center. Its Vector Coprocessor Interface Extension (VCIX) lets customers attach their own accelerators directly to the vector pipeline. The X280 is widely designed in, including as a control/host core in Google's data-center AI silicon.
SiFive's licensable RISC-V CPU portfolio spanning the high-performance Performance (P) series out-of-order application cores and the area-efficient Essential (E) series for embedded and control tasks. These configurable cores let chipmakers build custom SoCs on the open RISC-V ISA instead of licensing Arm, and underpin SiFive's design wins across automotive, mobile, data-center, and aerospace/defense markets.
SiFive's push into AI data-center silicon, including RISC-V IP designed to interoperate with Nvidia's NVLink Fusion so partners can build custom CPUs and accelerators that connect into Nvidia's rack-scale fabric. This positions SiFive's high-performance cores as host and companion processors in next-generation AI systems, extending RISC-V from the edge into large-scale AI infrastructure.
66 patents on file, but none with both an extractable figure and an abstract on Google Patents yet.